Arista DCS-7060DX5-32-F — 32×400G Spine Switch with Forward Airflow
The
Arista DCS-7060DX5-32-F is a 1RU, 32-port 400G spine switch built on the 7060X5 platform. Delivering
25.6 Tbps of non-blocking switching capacity with
825 ns cut-through latency and a
57 MB shared packet buffer, it is purpose-built for the spine layer of high-density 100G/400G leaf-spine fabrics and next-generation AI/ML and storage networks. The DX5-32 brings the advanced 7060X5 generation improvements to the compact 1RU form factor, delivering proven 400G performance with substantially deeper buffer than the prior DX4-32 generation. The “
-F” suffix denotes
front-to-rear (forward) airflow, the standard configuration for traditional hot-aisle/cold-aisle data center designs where cool air is supplied from the front of the rack. For rear-to-front airflow, see the
DCS-7060DX5-32-R.
Key Features at a Glance
- 32 × 400GbE QSFP-DD ports supporting 400G, 200G, and 100G speeds — up to 128 × 100G interfaces with breakout
- 25.6 Tbps non-blocking switching capacity — full wire speed across all 32 ports simultaneously
- 825 ns cut-through latency for consistent, low-jitter performance across all active ports
- 57 MB shared packet buffer — approximately 2.6× deeper than the prior DX4-32 (22 MB) for AI, storage, and bursty east-west workloads
- Advanced switching architecture for proven 400G performance and broad EOS feature support
- Front-to-rear airflow (“-F”) for standard hot-aisle/cold-aisle data center deployments
- Redundant, hot-swappable power supplies and hot-swappable fan trays
- Full L2/L3 feature set: VXLAN, EVPN, MLAG, 128-way ECMP, BGP, and advanced routing
- Dynamic Load Balancing for AI/ML all-reduce and storage traffic patterns
- Rich telemetry: LANZ, sFlow, AEM, and streaming telemetry
- Runs Arista EOS® with open APIs, Python/Bash scripting, and CloudVision® integration
25.6 Tbps Non-Blocking Architecture
The
DCS-7060DX5-32-F delivers
25.6 Tbps of full-duplex, non-blocking switching capacity across all 32 QSFP-DD ports. Every port operates simultaneously at 400G line rate without oversubscription — a non-negotiable requirement for spine switches where east-west bandwidth is the architectural constraint. This throughput ceiling holds regardless of traffic mix, packet size distribution, or active flow count, providing the consistent, predictable performance that modern leaf-spine and AI/ML fabric designs require. A single DCS-7060DX5-32-F spine can service up to 32 × 400G leaf switches at full line rate, or up to 128 × 100G leaf connections using 4×100G breakout — all without fabric head-of-line blocking.
825 ns Cut-Through Latency
Operating in cut-through switching mode, the
7060DX5-32-F delivers
825 nanoseconds of port-to-port latency with consistent, low-jitter performance across all 32 ports. This sub-microsecond performance is achieved at 400G speeds across all ports. For general data center spine switching, distributed computing, AI/ML cluster interconnect, and storage networking, 825 ns represents solid cut-through performance at 400G.
Port Density and Multi-Speed Flexibility
The 7060DX5-32 provides
32 × QSFP-DD ports plus
1 × SFP+ port, each QSFP-DD supporting multiple speeds and breakout configurations:
- 400GbE — native full-rate for 400G spine-to-spine, spine-to-leaf, or DCI connections
- 200GbE — dual 200G operation within a single QSFP-DD port for aggregation use cases
- 100GbE — backward-compatible 100G connectivity to existing QSFP28 infrastructure via adapter cables
- 4 × 100GbE breakout — connect up to 128 × 100G leaf switches from a single 1RU spine, using standard QSFP-DD to 4×QSFP28 breakout cables
- 2 × 200GbE breakout — dual 200G connectivity within a single QSFP-DD port for bonded uplinks or aggregation nodes
- 1 × SFP+ port — 1/10GbE management and out-of-band connectivity
This per-port flexibility allows a single 7060DX5-32 spine to simultaneously service native 400G leaf switches, connect to existing 100G leaf infrastructure via breakout, and provide 200G connectivity for aggregation — covering an entire multi-generation migration without hardware changes. A fabric that begins with 128 × 100G breakout connections can progressively consolidate toward 32 native 400G connections as leaf hardware is upgraded, using the same DX5-32 spine throughout.
57 MB Deep Shared Buffer: Built for AI, Storage, and Bursty East-West Traffic
The
57 MB shared packet buffer of the DX5-32 represents a significant improvement over prior 1RU 400G spine designs. Unlike fixed-per-port buffer architectures, the shared pool dynamically allocates buffer capacity to the ports and queues that need it most — a critical property when traffic is asymmetric, bursty, or subject to many-to-one incast patterns. Three workload categories benefit directly:
- AI/ML training fabrics: Distributed training jobs using collective operations (AllReduce, AllGather) generate synchronized, simultaneous bursts from hundreds of GPUs toward the same destination. Without sufficient buffer, these bursts cause packet drops, trigger RoCE retransmissions, and stall training iterations. The 57 MB buffer absorbs these all-reduce events at the spine layer, keeping GPU utilization high and training time predictable.
- NVMe-oF and high-throughput storage: Storage reads and writes generate large, bursty transfers that arrive in waves. The DX5-32’s deep shared buffer prevents the head-of-line blocking and packet drops that force storage retransmissions and inflate I/O latency — particularly important when multiple compute nodes simultaneously read from the same NVMe-oF storage pool.
- East-west incast in leaf-spine fabrics: When multiple leaf switches simultaneously send traffic to the same destination through a spine, the spine port toward that destination absorbs an incast burst many times the individual leaf rate. The 57 MB shared pool provides the buffer headroom to absorb these events without drops, even when several incast events coincide at high port utilization.
At 2.6× the buffer depth of the prior DX4-32 (22 MB), the DX5-32 is the clear choice when workload characteristics demand spine-layer buffer headroom alongside 400G port density in a compact 1RU form factor.
Spine-Optimized Fabric Support: VXLAN, EVPN, and 128-Way ECMP
The
7060DX5-32-F delivers the full Arista EOS spine feature set for modern data center and AI/ML fabric architectures:
- VXLAN: Spine-layer VXLAN routing for scalable overlay fabrics with large VNI counts across multi-tenant environments
- EVPN: BGP-based control plane for distributed MAC/IP learning, multi-tenancy, and seamless MAC mobility across the fabric
- Up to 128-way ECMP: Maximum path diversity across the spine layer, distributing east-west load evenly across all leaf uplinks and eliminating single-path bottlenecks
- BGP and IS-IS: Full-featured underlay routing for IP fabric, routed-spine, and eBGP-based CLOS topologies
- MLAG (Multi-Chassis Link Aggregation): Up to 64-way MLAG for redundant dual-homed leaf switch connectivity without STP convergence dependency
The DX5-32’s 57 MB buffer is particularly valuable in the spine role when multiple leaf switches simultaneously burst toward the same destination — a recurring pattern in AI training all-reduce operations and distributed storage reads where many-to-one traffic converges at the spine tier.
Telemetry, Monitoring, and Real-Time Insight
The
DCS-7060DX5-32-F includes Arista’s full telemetry stack for spine-layer observability at 400G scale:
- LANZ (Latency Analyzer): Per-port, real-time queue depth visibility and microburst detection — essential for diagnosing congestion events at the 400G spine without impacting production traffic. LANZ provides the visibility to detect buffer exhaustion before it causes drops, enabling proactive capacity management.
- sFlow: Continuous traffic sampling for east-west flow analysis, elephant flow detection, and capacity planning across 400G uplinks
- AEM (Advanced Event Management): Rule-based, programmable alerting for link events, queue thresholds, and routing protocol state changes at the spine layer
- Streaming Telemetry: High-frequency counter and state export to gRPC collectors, Grafana, Prometheus, and third-party NMS tools — providing the per-second buffer and utilization visibility that AI/ML fabric operators require
EOS Automation and Extensibility
Running on
Arista EOS®, the
DCS-7060DX5-32-F is built for automation-first network operations:
- Native on-box Python and Bash scripting via the Linux shell for event-driven automation
- JSON-RPC eAPI for programmatic configuration — integrates with Ansible, Terraform, Salt, and Nornir
- CloudVision® for centralized configuration management, zero-touch provisioning, network-wide change control, and topology visualization
- OpenConfig and gNMI/gRPC for model-driven management and high-frequency streaming state export
- Zero-Touch Provisioning (ZTP) for fully automated day-0 configuration of new spine switches without manual intervention
Front-to-Rear Airflow and Data Center Fit
The “
-F” airflow configuration provides
front-to-rear (forward) cooling, where cool air enters from the non-port side of the switch and exhausts from the port side. This is the standard configuration for:
- Traditional hot-aisle/cold-aisle containment deployments where cold air is supplied from the front of the rack
- Racks where the majority of compute and network gear already uses front-to-rear airflow
- Colocation facilities that standardize on forward airflow for all customer equipment
- New data center builds following ASHRAE thermal guidelines
Port Speeds and Breakout Configurations
- Native 400GbE: All 32 QSFP-DD ports operate at 400G line rate for maximum spine-to-leaf throughput
- Dual 200GbE breakout: Each QSFP-DD port can be configured as 2×200G for aggregation or bonded leaf uplinks
- Quad 100GbE breakout: Each QSFP-DD port can be configured as 4×100G, allowing up to 128 × 100G leaf connections
- 100GbE compatibility: Backward-compatible with QSFP28-based 100G infrastructure via adapter cables
Routing and Fabric Support
- ECMP: Up to 128-way equal-cost multipath with 4K groups and 16K members
- Dynamic Load Balancing (DLB): Real-time traffic engineering and load rebalancing across ECMP paths for AI/ML all-reduce and elephant flow optimization
- BGP and IS-IS: Full-featured routing protocols for IP fabric and routed-spine deployments
- VXLAN/EVPN: Overlay fabric support for multi-tenant isolation and seamless MAC mobility
Table Sizes and Forwarding Capacity
- MAC addresses: 128K entries
- IPv4 LPM routes: 800K entries
- IPv6 LPM routes: 500K entries
- ACL entries: 2304 ingress / 512 egress
- IPv4 multicast groups: Full line-rate multicast support for fabric-wide traffic replication
QoS and Traffic Management
- Queue structures: 8 unicast + 2 multicast queues per port with strict priority and weighted round-robin scheduling
- Flow control: Per-Priority Flow Control (PFC) and Data Center Bridging (DCB/DCBX) for lossless Ethernet and RoCEv2 support
- Classification: 802.1p and DSCP-based traffic classification with ECN support
- Congestion management: Tail Drop and ECN for fair congestion signal distribution across the fabric
Telemetry and Analytics
- LANZ: Latency Analyzer for per-port queue depth, microburst detection, and real-time congestion visibility
- Streaming telemetry: GPB and JSON encoded gRPC export to Prometheus, Grafana, and third-party collectors
- sFlow: Continuous packet sampling for traffic analysis and elephant flow detection
- AEM (Advanced Event Management): Programmable alerting and event-driven automation triggers
- SNMP and syslog: Traditional network monitoring and centralized log aggregation
Automation and Management
- EOS CLI: Industry-standard command-line interface with full configuration scripting
- JSON-RPC eAPI: RESTful API for programmatic configuration and state retrieval
- Python/Bash: Native on-box scripting for event-driven automation and custom plugins
- CloudVision: Centralized configuration management, topology visualization, and change control
- OpenConfig/gNMI: Model-driven telemetry and standards-based configuration
- Zero-Touch Provisioning (ZTP): Automated day-0 bring-up without manual configuration
Security Features
- Secure boot: Digitally signed EOS images prevent unauthorized firmware modifications
- Role-Based Access Control (RBAC): Granular operator and administrator privilege separation
- Authentication: TACACS+, RADIUS, LDAP, and SSHv2 for centralized access control
- ACLs: L2/L3/L4 traffic filtering at spine layer for tenant isolation and security policy enforcement
- Control Plane Policing (CoPP): Protect the switch CPU from volumetric attacks targeting the management plane
Reliability and High Availability
- Redundant power supplies: Dual 1+1 hot-swappable PSUs for uninterrupted spine operation through PSU failures
- Redundant fans: 3 fans with N+1 redundancy; failure of any single fan does not impact cooling
- Stateful Fault Repair (SFR): Automatic recovery from software faults without traffic loss
- Stateful Fault Containment (SFC): Isolate faults to prevent network-wide propagation
- Smart System Upgrade (SSU): Non-disruptive EOS upgrades with graceful control plane convergence
- Accelerated Software Update (ASU): Fast, hitless software patching without traffic interruption
Deployment Scenarios and Industry Applications
- AI/ML Training Fabrics: The primary use case the DX5-32 is engineered for — 32×400G spine connectivity with a 57 MB buffer for GPU cluster all-reduce traffic, DLB for real-time load rebalancing, and LANZ for microburst visibility during training runs. Supports RoCEv2 for GPU-Direct RDMA across the fabric.
- 100G/400G Mixed-Generation Leaf-Spine Fabrics: Using 4×100G breakout, the DX5-32 connects to existing 100G leaf infrastructure today while supporting native 400G leaf uplinks as the fabric is upgraded — eliminating the need to replace the spine tier during a generational transition.
- NVMe-oF and High-Throughput Storage Fabrics: 25.6 Tbps non-blocking capacity with 57 MB buffer depth for storage networks where burst tolerance at the spine layer directly determines storage I/O consistency and tail latency.
- Hyperscale and Cloud Data Centers: 25.6 Tbps non-blocking spine capacity with 128-way ECMP for full-bisection-bandwidth cloud fabric designs requiring 400G inter-pod connectivity from a single 1RU unit.
- Large Enterprise Data Centers: Spine upgrade path for enterprise data centers moving from 100G to 400G, with backward compatibility through QSFP-DD multi-speed support preserving existing optics investments.
- HPC Clusters: High message-passing workloads generating synchronized incast patterns benefit from 57 MB buffer depth and Dynamic Load Balancing for consistent job completion times.
Power Efficiency and Thermal Management
The
DCS-7060DX5-32-F delivers approximately
9 W per active 400G port at typical utilization, with redundant power supplies rated for
high conversion efficiency. For a 32-port 400G spine switch in a 1RU form factor, this power envelope represents strong energy efficiency relative to the bandwidth delivered — approximately 4× the throughput of a 100G spine at substantially less than 4× the power draw. Three N+1 redundant fan trays with tool-less replacement ensure continuous operation through thermal events without scheduled maintenance.
Similar Arista Models to Consider
- Arista DCS-7060DX5-64S-F – 2RU, 64×400G spine with 114 MB buffer and 825 ns latency. Ideal for massive-scale fabrics requiring maximum spine capacity.
- Arista DCS-7060CX2-32S-F – 32×100G 7060CX2 spine with 22 MB buffer and 450 ns cut-through latency. The right choice when 100G is sufficient and sub-500 ns latency is required.
- Arista DCS-7280DR3-24-F – 24×400G switch router with 16 GB ultra-deep buffer and full MPLS/SR routing for DCI and WAN-edge deployments.
Related 7060X5 Resources
Arista 7060 Series Switches: Architecture, Models, and Deployment Guide
The 400G Spine Built for AI, Storage, and Next-Generation Leaf-Spine Fabrics
The
Arista DCS-7060DX5-32-F brings together 25.6 Tbps of non-blocking capacity, 32 native 400G QSFP-DD ports, 57 MB of shared packet buffer, and the full depth of Arista EOS automation into a 1RU spine switch built for the workloads that define modern data center infrastructure — AI training, NVMe-oF storage, and high-density east-west fabrics. Its front-to-rear airflow makes it the natural fit for standard hot-aisle/cold-aisle data center deployments, and its multi-speed QSFP-DD ports protect existing 100G infrastructure investments while enabling a clean migration to 400G. Available from BrightStar Systems fully tested, reset to factory defaults, and backed by a 1-year in-house warranty.
